I will rtl design in vhdl, verilog or systemverilog for fpga and asic

What I Can Do for You:

• Digital design in VHDL, Verilog or SystemVerilog for any kind of a project.
• Simulation & Testing: I'll handle simulation in Vivado/QuestaSim/Modelsim/VCS and testing on the Pynq Z2 SoC board.
• Xilinx Projects: Expert help with anything related to Xilinx toolchains.
• Vivado Block Design: Creating block designs for complex systems in Vivado.
• Documentation: Detailed pre and post-synthesys time diagrams, explanation of architecture and block diagram of a system.

Why Work with Me?

• Expert Knowledge: I know my stuff and have a quite solid background in VLSI design.
• Hands-On Experience: Practical experience with many FPGAs and ASIC design flows
• Quality Work: I'm all about delivering high-quality, customized solutions.
• On-Time Delivery: You can count on me to meet your deadlines.

I'm delivering solutions ASAP at requested quality, don't hesitate to contact me!