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Engr Majid
@engr_majid_ali
Hardware Design Engineer
Paquistão
Hindi, Inglês, Urdu
Sobre mim
I am Majid Ali, an Electrical Engineer specializing in RISC-V, SoC and ASIC design. With strong expertise in Verilog, SystemVerilog, UVM, C\C++, Python and RISC-V Assembly, I bring a solid background in both digital design and functional verification.
I have hands-on experience with FPGA-based prototyping and UVM-based verification, ensuring reliable design implementation and robust verification environments. Whether it’s processor design, verification or hardware prototyping, I deliver solutions that are both efficient and professional.
Habilidades
Engr Majid
offline •
Tempo médio de resposta: 1 hora
Conheça meus serviços
Programação e Tecnologia
I will design a custom riscv cpu core for your fpga or asic project
Sistemas Incorporados e IoT
I will develop fpga based digital systems and IP cores in verilog
