
Joel Reynolds
FPGA Design Engineer VHDL, SystemVerilog, Xilinx Zynq, RTL, DSP Embedded System
Habilidades

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Experiência profissional
FPGA & Embedded Systems Engineer
Kwork • Freelance
Nov 2020 - Present • 5 yrs 9 mos
Designed and developed FPGA and embedded hardware solutions for industrial automation, telecommunications, AI, robotics, and high-speed digital systems. Created synthesizable RTL using VHDL, Verilog, and SystemVerilog for AMD/Xilinx FPGA platforms, including Zynq and UltraScale+ devices. Developed digital signal processing (DSP) architectures using DSP48E2 slices, implemented AXI4/AXI4-Lite interfaces, integrated DDR memory, PCIe, Ethernet, UART, SPI, and I²C peripherals, and optimized clocking with MMCM and PLL resources. Performed RTL simulation, logic synthesis, timing closure, hardware verification, FPGA debugging with Vivado ILA, and hardware-in-the-loop (HIL) validation. Built Embedded Linux and PetaLinux solutions, generated production-ready bitstreams, and collaborated with multidisciplinary engineering teams to deliver reliable, high-performance embedded hardware.